1. Field of the Invention
The present invention relates to an integrated circuit in which an analog circuit and a digital circuit are mixed and further to a testing method thereof.
2. Description of the Prior Art
In recent years, the analog/digital mixed circuit technology in which an analog circuit and a digital circuit are integrated to form one chip has been considered to enhance the performances of an integrated circuit. In this case, it is necessary to test the actually fabricated semiconductor chip to determine whether it can achieve the desired functions/operations by using an LSI tester. That is, it is required to test the operations of not only the analog circuit but also the digital circuit.
Since, however, the conventional LSI tester for digital circuit is so constructed as to put emphasis only on the value of the logical signal and the timing of its appearance and cannot take its output waveform into consideration, an LSI tester dedicated to testing an analog circuit is required. As such an apparatus, one may point out two types, namely, an LSI tester which exclusively verifies only analog circuits, and an LSI tester for analog and digital circuits which can handle both the analog signal and the digital signal.
In the former apparatus, the digital test and the analog test have to be executed separately for the respective circuits, requiring the tests to be repeated twice. Moreover, the whole circuit has to be constructed so as to permit separation of the digital circuit from the analog circuit, so that it brings about an increase in the chip area and the number of terminals. A configuration of a mixed analog/digital circuit which suppresses such a disadvantage to a possible minimum and increases the observability and the controllability is disclosed in, for example, Japanese Patent Application Laid Open No. 2-19780 (1990). However, in this configuration, an analog tester is absolutely necessary, and the need for twice repeating tests remains unchanged.
In the latter, it is necessary to take the output waveform, in addition to the function of the digital tester, into consideration so that the LSI tester becomes expensive and the number of available testers has to be cut down drastically due to the cost. Because of this, the testing time and the testing cost for a chip of mixed analog and digital circuits are increased drastically compared with the case of a chip lacking the analog circuit, and one finds oneself to be on the horns of a dilemma of imparting an added value and rise in the cost. Therefore, if a mixed chip of analog and digital circuits can also be tested using a digital tester alone, it would be extremely advantageous.
From such a viewpoint, a mixed analog/digital circuit as disclosed in, for example, Japanese Patent Application Laid Open No. 1-138478 (1989) has been proposed in the past.
Referring to FIG. 6 showing a circuit configuration essentially equivalent to the above, a circuit consituted of a digital circuit 62 and a D/A converter 64 connected to the output of the digital circuit 62 is shown in this circuit, wherein the function of outputting an analog signal is added to the ordinary function of the digital circuit.
In order to execute the test of this circuit with a digital tester, the analog output is further split into two parts, where an A/D converters 63 is connected to one of them to reconvert the analog output to get a digital signal again. If both the D/A converter 64 and the A/D converter 63 which is an additive function dedicated to the test are operating normally, a digital signal x immediately before D/A conversion and a digital signal z immediately after A/D conversion should be strictly equal, therefore, the test is accomplished by detecting the equivalence.
However, if the relation between the digital signal x and a signal y which is the result of its D/A conversion is represented by y=f(x), and the relation between the A/D converted signal z and the signal y is represented by z=g(y), then it follows that z=g(f(x)). The testing technique of the prior art shown in FIG. 6 is aimed only at the verification of whether g is the inverse function of f, and is not aimed at ensuring the validity of the A/D converter and the D/A converter, namely, their linearity.
In the extreme case in which the data bus of the signal x and the data bus of the signal z are short-circuited, there is a possibility of letting the products pass the test as nondefective no matter what the signal y may be. Moreover, since it provides only the testing method of the D/A converter 64 on the output side, application of this testing method to a general analog/ digital mixed integrated circuit was difficult.